K.G.VENKATA KRISHNA; ANUSHA BATHALA; ASIRI NAIDU KOYYANA; VAMSI KRISHNA REDDY.S. DESIGN AND ANALYSIS OF 32 – BIT HIGH SPEED RISC PROCESSOR USING PIPELINING TECHNIQUE. Journal of Science & Technology , [S. l.], v. 10, n. 4, p. 34–44, 2025. DOI: 10.46243/jst.2025.v10.i04.pp34-44. Disponível em: https://jst.org.in/index.php/pub/article/view/1243. Acesso em: 8 may. 2025.