B.N. SRINIVASARAO; DR. K. CHANDRABHUSHANA RAO. A comparative analysis of 128 bytes SRAM architecture using Single ended three and six transistor SRAM cells. Journal of Science & Technology (JST), [S. l.], v. 7, n. 2, p. 21–29, 2022. Disponível em: https://jst.org.in/index.php/pub/article/view/253. Acesso em: 17 jul. 2024.