K.G.VENKATA KRISHNA, ANUSHA BATHALA, ASIRI NAIDU KOYYANA, VAMSI KRISHNA REDDY.S. DESIGN AND ANALYSIS OF 32 – BIT HIGH SPEED RISC PROCESSOR USING PIPELINING TECHNIQUE. J. sci. technol. [Internet]. 2025 Apr. 25 [cited 2025 Sep. 14];10(4):34-4. Available from: https://jst.org.in/index.php/pub/article/view/1243